ADSP-21MOD970 |
RFQ for ADSP-21MOD970 Required Field |
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| Product | Manufacturers | Pack | D/C |
| ADSP-21MOD970 | - | QFP | - |
The ADSP-21mod970 is a Multiport Internet Gateway Processor optimized for implementation of a complete V.34/56K modem. All data pump and controller functions can be implemented on a single device, offering the lowest power consumption and highest possible modem port density.
The ADSP-21mod970 combines the ADSP-2100 family base architecture (three computational units, data address generators and a program sequencer) with two serial ports, a 16-bit internal DMA port, a byte DMA port, a programmable timer, Flag I/O,
extensive interrupt capabilities and on-chip program and data memory.
The ADSP-21mod970 integrates 960 bytes of on-chip memory, configured as 192K words (24-bit) of program RAM, and 192K words (16-bit) of data RAM. Power-down circuitry is also provided to meet the low power needs of battery operated portable equipment. The ADSP-21mod970 is available in a 31 sq-mm., 304-lead PBGA package.
Features |
| PERFORMANCEComplete Single-Chip Multiport Internet Gateway Processor (No External Memory Required)Implements Six Modem Channels in One PackageEach Processor Can Implement V.34/V.90 Data/Fax Modem (Includes Datapump and Controller)312 MIPS Sustained Performance, 19 ns Instruction Time @ 3.3 VOpen Architecture Extensible to Voice Over IP and Other Applications Low Power Dissipation, 100 mW (Typical) per Digital Modem ProcessorPower-Down Mode Featuring Low CMOS Standby Power DissipationINTEGRATIONADSP-2100 Family Code Compatible, with Instruction Set Extensions960K Bytes of On-Chip RAM, Configured as 576K Bytes of Program Memory and 384K Bytes of Data MemoryDual Purpose Program Memory for Both Instruction and Data Storage304-Ball PBGA with a 1.45 Square Inch (961 sq. mm) FootprintSYSTEM CONFIGURATION16-Bit Internal DMA Port for High Speed Access to On- Chip Memory (Mode Selectable)Programmable Multichannel Serial Port Supports 24 Channels/32 ChannelsTwo Double-Buffered Serial Ports with Companding Hardware and Automatic Data BufferingSeparate RESET Pins for Each Internal Processor |
